The invention relates to a method of fabricating a MOS transistor, and more particularly, to a method of fabricating a MOS transistor using a millisecond anneal to activate dopants.
In semiconductor fabrication, dopants are often implanted in a semiconductor wafer to control a number of electric carriers and form a plurality of conductive doped regions in the semiconductor wafer to construct electric devices. Dopants are implanted by doping processes. Typically, after doping, such as by ion implantation, thermal diffusion, or chemical evaporation, forms a doped region in a semiconductor substrate, a thermal process then repairs damage caused by the doping process and activates dopants in the substrate to reduce resistance of the doped regions.
During thermal process, dopants diffuse outward from the designable doped region since the dopant concentration of the designable doped region is higher than that of the semiconductor substrate. As duration of the thermal process increases, diffusion distance of dopants, leading to obvious changes in shape, location, and dopant concentration. Some semiconductor technologies drive dopants into a semiconductor substrate deeply or enlarge the doped region in this manner.
As semiconductor devices are scaled down and integration thereof increases, precise control of the doped region is needed. Thus, duration of the thermal process is reduced significantly. For example, a conventional thermal process may take 20 to 30 minutes. Current thermal process, such as rapid thermal annealing (RTA) or rapid thermal process (RTP), can typically take one minute. For laser annealing, the duration is only several nanoseconds. Since the RTP or RTA has a high temperature ramp up rate and short duration, a shallow diffusion depth can be achieved, reducing junction depth and diffusion in lateral directions and avoiding short channel effect and threshold voltage shift, associated with conventional process. However, when the device generation is nanometer scale, particularly less than 60 nm, RTA remains unable to completely satisfy the requirements of junction activation or device performance.